Thomas D. VanCourt, Ph. D.
Con tact Information
Personal address
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831 – 419 – 3383 |
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tom@vancourt.net |
Current employment address
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Altera Corporation,
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408 – 544 – 8505 |
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2155 |
tvancour@altera.com |
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Research and Teaching Interests
My interests center on application specific computer architecture based on FPGAs, codesign of hardware/software systems, and design automation tools. Current work addresses:
× Tools for end user creation of high performance, FPGA-based application accelerators.
× Performance computing on FPGA platforms.
× Acceleration of application families in bioinformatics, computational chemistry, finance, and other areas.
× Application of software engineering principles to hardware design.
× High-level design methodologies, for both hardware and software.
× Novel reuse models for FPGA-based intellectual properties.
Education
Ph.D.
Dissertation: “LAMP, A Tool Suite for Application-Specific FPGA Coprocessors,” under the supervision of Dr. Martin C. Herbordt.
M.S.
GPA 3.94, Thesis:
“Reverse Engineering Design Patterns from Compiled Programs,”
under the supervision of Dr. Eric
Braude.
B.S.
Appointments
Primary Appointments
Senior Member of Technical Staff, Software Engineering June
2006 – present
Altera Corporation,
Post-doctorate researcher. Spring 2006
Computer Architecture and Automated
Research Assistant, Fall 2002 – Fall 2005
Computer Architecture and Automated Design Laboratory
Senior Software Engineer (founder), Spring 2002
Kernel development for secure processor
Silicon Keep Inc.,
Senior Software Engineer, Fall 2001 – Spring 2002
Porting of cryptographic utilities to embedded media processor
InterTrust Technologies Corp.,
Principal Engineer, 1993 – 1997
Embedded software development
PixelVision Inc.,
Principal Engineer, 1991 – 1993
Host interface, API development
PictureTel Corporation,
Senior Software Engineer, 1983 – 1991
1989 – 1991, OS Development Group: File system and OS development
1987 – 1989, Graphics Systems Group: Graphics drivers and libraries
1985 – 1987, Network Group: Network drivers and OS internet support
1983 – 1985, Network Group: Network management, including OS support
Apollo/Hewlett Packard Company,
Software Engineer, 1978 - 1983
1982 – 1983, CAD Tools Group: LSI CAD tool development
1981 – 1982, Methods and Tools Group: Device control
1978 – 1981, Methods and Tools Group: Microcode and microprocessor tools
Digital Equipment Corporation, Maynard MA
Intern, Summer 1977
Mainframe microcode development
IBM Corporation,
Parallel Appointments
Instructor, Spring 2001 – Fall 2007
Taught graduate level classes in software design, software
engineering, operating systems, information system analysis, and
telecommunications. Created “Components” curriculum of “Design Patterns and
Components” course.
Consultant, Spring 2004 – Fall 2004
Publications
Refereed Journal Articles
T. VanCourt and M C.
Herbordt (2005). “Families of FPGA-Based Accelerators for Approximate String Matching”.
Special Issue on FPGA-based Reconfigurable Computing, Journal of
Microprocessors and Microsystems, 2007.
T. VanCourt, Y. Gu, V. Mundada, and M. C. Herbordt (2005). “Rigid
Molecule Docking: FPGA Reconfiguration for Alternative Force Laws”. EURASIP
Journal on Applied Signal Processing, 2006.
T. VanCourt, M.C. Herbordt and R. J. Barton (2004), “Case Study of a Functional Genomics Application for an FPGA-Based Coprocessor”. Microprocessors and Microsystems 28(4)213‑222, special issue on FPGA Applications, Algorithms, and Tools.
Refereed Journal Articles (coauthor)
Martin C. Herbordt,
Yongfeng Gu, Tom VanCourt, Josh Model, Bharat Sukhwani, Matt Chiu,
"Computational Models for FPGA-Based Computing with Case Studies in
Molecular Modeling", Computing in Science and Engineering, accepted for publication 2008
Yongfeng Gu, Tom VanCourt,
Martin C. Herbordt. “Explicit design of FPGA-based coprocessors for short-range
force computations in molecular dynamics simulations,” Parallel
Computing, in press 2008
Martin C. Herbordt, Josh
Model, Bharat Sukhwani, Yongfeng Gu, Tom VanCourt. “
Martin C. Herbordt, Tom
VanCourt, Yongfeng Gu, Bharat Sukhwani, Al Conti, Josh Model Doug DiSabello. “Achieving High Performance
with FPGA-Based Computing.” IEEE Computer, 2007
Yongfeng Gu, Tom VanCourt,
and Martin C. Herbordt. “Accelerating Molecular Dynamics Simulations with
Configurable Circuits”. IEE Proceedings on Computers & Digital
Techniques, 2006.
Articles in Refereed Conference Proceedings
T. VanCourt and M.C.
Herbordt: “Application-Specific Memory Interleaving for FPGA-Based Grid
Computations: A General Design Technique”, Proceedings of Field
Programmable Logic and Applications (FPL) 2006.
T. VanCourt and M.C. Herbordt:
“Sizing of Processing Arrays for FPGA-Based Computation”, Proceedings of
Field Programmable Logic and Applications (FPL)
2006.
T. VanCourt and M.C.
Herbordt: “Application-Dependent Memory Interleaving Enables High Performance
in FPGA-based Grid Computations”, IEEE Symposium on Field-Programmable
Custom Computing Machines (FCCM) 2006
T. VanCourt and M.C.
Herbordt. “LAMP: A Tool Suite for Families of FPGA-based Computation
Accelerators”. Proceedings of Field Programmable Logic and Applications (FPL), August 2005
T. VanCourt, Y. Gu, and M.
C. Herbordt (2005), “Three-Dimensional Template Correlation: Object Recognition
in Voxel Data (preliminary version),” Proceedings of Computer
Architecture for Machine Perception (CAMP),
July 2005
T. VanCourt and M.C.
Herbordt (2004): “Families of FPGA-Based Algorithms for Approximate String
Matching,” Proceedings of Application-Specific Systems, Architectures,
and Processors (ASAP), September 2004
T. VanCourt, Y. Gu, and
M.C. Herbordt (2004): “FPGA Acceleration of Rigid Molecule Interactions,” Proceedings
of Field Programmable Logic and Applications (FPL),
September 2004. Also in Lecture Notes in Computer Science, 3203, J. Becker, et al., editors, Springer
Verlag
T. VanCourt, Y. Gu, and
M.C. Herbordt (2004): “FPGA Acceleration of Rigid Molecule Interactions,” Proceedings
of Symposium on Field Programmable Custom Computing Machines (FCCM), April 2004.
T. VanCourt, M.C.
Herbordt, and R.J. Barton (2003): “Case Study of a Functional Genomics
Application for an FPGA-Based Coprocessor," Proceedings of Field
Programmable Logic and Applications (FPL),
September 2003 pp. 365-374. Also in Lecture Notes in Computer Science, 2778, P.Y.K.
Cheung, et al., editors, Springer Verlag.
Articles in Refereed Conference Proceedings (coauthor)
N. A. Woods and T.
VanCourt: “FPGA Acceleration of Quasi-Monte Carlo in Finance.” Accepted for
publication in Proceedings of Field Programmable Logic and Applications (FPL) 2008. Runner-up for best paper award.
Y. Gu, M.C. Herbordt, and
T. VanCourt: “Improved Interpolation for FPGA-Based Molecular Dynamics
Simulations,” Proceedings of Field Programmable Logic and Applications (FPL) 2006
M.C. Herbordt, T.
VanCourt, Y. Gu, J. Model, and B. Sukhwani: “
Y. Gu, M.C. Herbordt, and
T. VanCourt (2006): “Integrating FPGA Acceleration into the ProtoMol Molecular
Dynamics Code”, Proceedings of IEEE Symposium on Field-Programmable
Custom Computing Machines (FCCM) 2006
Y. Gu, T. VanCourt, and
M.C. Herbordt. “Accelerating Molecular Dynamics Simulations with Configurable
Circuits”. Proceedings of Field Programmable Logic and Applications (FPL), August 2005
Y. Gu, T. VanCourt, D.
DiSabello, and M.C. Herbordt (2005). “FPGA Acceleration of a Molecular Dynamics
Application,” Symposium on Field Programmable Custom Computing Machines (FCCM) 2005
A. Conti, T. VanCourt, and
M.C. Herbordt (2004): “Processing Repetitive Structures with Mismatches at
Streaming Rate,” Proceedings of Field Programmable Logic and
Applications (FPL), September 2004. Also in Lecture
Notes in Computer Science, 3203, J. Becker, et al., editors, Springer Verlag
Workshop Presentations without Proceedings
T. VanCourt. “VLIW with
Variable Partitioning and Threading,”
T. VanCourt and M. C.
Herbordt. “Requirements for any HPC/FPGA Application Development Tool Flow”.
T. VanCourt and M. C. Herbordt, “Making FPGAs a Cost-Effective
Computing Architecture”,
T. VanCourt and M. C.
Herbordt, “Processor-Memory Networks Based on Steiner Systems”,
Book, Supplementary Material
Invited Articles
“Practical 3D template matching with FPGAs”. SPIE Newsroom, 2006.
“Reverse Engineering Design Patterns from Compiled Programs.”
Invited Seminars
“C to gates compilation: Different tools for different tasks,” industry track presentation, Conference on Field Programmable Logic (FPL) 2008
“Advances in Reconfigurable Computing,” member of discussion panel, High Performance Reconfigurable Computing Technology and Applications (HPRCTA), 2008
“Multicore Meltdown,” member of discussion panel, High Performance Embedded Computing (HPEC), 2007
“Techniques for Customizing, Optimizing, and Interfacing with FPGAs for Specific Applications,” TechConnect Summit 2007
“Advances in Processor Technology,” member of discussion panel, Linux Networx Xchange (LiNX) 2006
“FPGA Application Accelerators: More than Logic Design”.
“Opportunities for the Application of Special-Purpose Computing to Protein-Ligand Docking”, Mercury Computer System Inc., September 2004
“Families of FPGA-Based Algorithms for Approximate String
Matching: A Case Study in Flexible Design”,
Other Articles and Presentations
“Modular
Arithmetic: A Divisive Issue” Programmable
Logic DesignLine, 2008, http://www.pldesignline.com/howto/207200944
“Reconfigurable
Computing: Custom Supercomputers on Demand?” Programmable Logic DesignLine, 2008,
http://www.pldesignline.com/howto/207200944
Grant proposals
M. C. Herbordt, Principal Investigator. Wrote sections of the proposal for “FPGA-Based Computational Accelerators,” resulting in National Institutes of Health Award #RR020209-01. July 2004 – June 2006. ($344,097)
M. C. Herbordt, Principal Investigator. Wrote sections of the proposal “Towards the use of FPGAs for Computation”. National Science Foundation. Was not funded. ($544,000)
Teaching -
Computer Science Department
Instructor
Information Systems Analysis and Design (MET CS 682) S07, F07
Object-oriented methods for information systems analysis. Requirements
analysis, use cases and UML. Hardware/software tradeoffs, testing, and
deployment, taught remotely.
Design Patterns and Component Software (MET CS 665) S01, F02,
S/F03, S/F04, S05, S06
Software design patterns, based on Gamma et al. Technological basis of
component software systems, including reflection, dynamic instantiation, and
serialization.
Introduction to Operating
Systems (MET CS 575) S06
Operating system operation: processes, virtual memory, file systems, IO,
networking, and security.
Software Engineering (MET CS
673) F01
Managing projects using IEEE standards for software specification
Technical Foundations of Telecommunication (MET TC 650) S03
Digital system analysis, filter response, and system stability, in the context
of telecommunication systems
Course Development
Design Patterns and Component Software (MET CS 665)
Teaching – Industrial Training
Customer and Field Service product training (one day), PixelVision Inc., six times 1994-1997
“Developer’s Toolkit,” customer training (one day), PictureTel Corporation, 1992
“JET chip tester” user training (three days), Digital Equipment Corporation and Harris Corporation, 1981
Awards
2001
Professional Service
Referee and Review
Reviewer, Journal of Parallel and Distributed Computing. 2006, 2009
Technical program committee, Third International Conference on High Performance Embedded Architectures & Compilers (HiPEAC) Workshop on Reconfigurable Computing (WRC) 2009
Technical program committee, International Conference on Application Specific Array Processors (ASAP) 2009
Technical program committee, Workshop on High Performance Reconfigurable Technology and Applications (HPRTCA) 2008
Technical program committee, International Conference on Field Programmable Logic and Applications (FPL), 2007, 2008
Technical program committee, International Conference on Field Programmable Technology (FPT) 2008
Technical program committee, International Conference on High Performance Embedded Architectures & Compilers (HiPEAC), workshop on Reconfigurable Computing (HiPEARC), 2008
Reviewer, Journal of Real Time Image Processing, 2007, 2008
Reviewer, IEEE Transactions on Very Large Scale Integration Systems, 2007
Technical program committee, International Symposium on Bioinformatics & Bioengineering (IEEE BIBE) 2007
Technical program committee, Boston Area Architecture Conference (BARC) 2007
Technical review for a revised edition of “UML and the Unified Process”, J. Arlow and I. Neustadt, Pearson Education Ltd., 2005
Reviewer, Computer Architecture for Machine Perception (CAMP) 2005
Standards Development
ANSI X3T9.5 (FDDI) standards committee, 1987. Proposed protocols at the station management (SMT) layer, including detection of duplicate MAC addresses.
Department Service
Member, Software Engineering Curriculum Committee 2001-2005
Session chair
Boston Area Computer Architecture (BARC) Workshop 2007, invited speaker’s session
Field Programmable Logic (FPL) 2006, session on Cryptographic Applications
Volunteer service
Recording for the Blind and Dyslexic, 1999-2001, 2006-2008. Reader. Certified for technical specialties: general mathematics, statistics, computer science, general science, and physics
The Textbook League, 2000-2007. Reviewer of mathematics text books at middle school and high school levels.
Industrial Experience
Altera Corp. (2006 – present) Senior Member of Technical
Staff, Software Engineering
Develop tools for compiling high-level languages into synthesizable logic.
Mercury Computer Systems,
Inc. Consultant, Spring– Fall 2004
Analyzed new opportunities for Mercury computing products in life science
applications.
Silicon Keep (2002). Founding member, Software Architect
Developed security kernel and applications. Some Web development and graphic
design.
InterTrust Technologies Corp. (2001-2002) Senior Software
Engineer
Developed security kernel for embedded intellectual property protection system.
Instituted source control, created release packages. Ported a cryptographic
kernel to Samsung embedded processor for an MP3 appliance.
PixelVision Inc. (1993-1997) Principal Engineer
Developed real-time embedded software for five generations of flat-panel
monitor products. Some circuit design, component specification, and
hardware/software co-development and co-debug. Implemented the graphical user
interface, video decoding, internal hardware control, and internal debugger.
Developed ISO 9000 software release procedures. Trained manufacturing staff, customer service, and customers on hardware, software, and system usage. Presented internal seminars, including low-level network protocols, video signal formats, LCD operation, and proprietary video handling.
PictureTel Corporation (1991-1993) Principal Engineer
Project engineer for Developers’ Toolkit (DTK), a C-language API for control of
videoconferencing equipment. Designed the system and managed the development
team. Coordinated sales, marketing, customer service, technical documentation,
and quality assurance groups to deliver PictureTel’s first software-only
product. Delivered internal seminars, including software internationalization.
Apollo/Hewlett Packard (1983-1991) Senior Software Engineer
(1989 – 1991, Operating Systems Development Group) Ported the OSF Unix kernel’s
Logical Volume Manager (LVM) to HP/UX. Modified Domain/OS kernel and network
file protocols to support an optical jukebox storage device. Created new
utilities and OS support for jukebox administration.
(1987 – 1989, Graphics Systems Group) Project engineer and architect for development of multiple-display systems. Managed the development team and led implementation, including graphics driver layers and mouse/pointer interface. Worked with others on new architecture for graphics libraries and drivers to be shared between HP-UX and Domain/OS. Contributed to ports of Domain/OS between 680x0 platforms and to DN10000 multiprocessor.
(1985 – 1987, Network Group) Wrote protocol proposals for ANSI X3T9.5 (FDDI) station management (SMT) standard committee. Extended Domain/OS to XNS routing protocols. Developed a network driver layer for Domain/OS, including diskless booting, network management, and drivers for IEEE 802.3, IEEE 802.5, FDDI, and T1 networks.
(1983 – 1985, Network Group) Developed a tool suite for collecting, analyzing, and displaying network and performance data, for networks of several hundred workstations.
Digital Equipment Corporation
(1978-1983) Software Engineer
(1982 – 1983, Computer Aided Design Tools Group) Developed a novel technique
for geometric design rule checking of LSI layout, allowing non-redundant
verification of repetitive structures.
(1981 – 1982, Methods and Tools Group) Designed and implemented software, device control and UI, for a custom chip test instrument. Wrote the user ~120 page manual and trained the users.
(1978 – 1981, Methods and Tools Group) Extended a retargetable micro-assembler, including a port from a 36-bit to a 32-bit platform. Wrote the microcode loader for Vax 11/780. Packaged the loader and micro-assembler and released them to customers. Developed control software for an in-circuit emulator, including host, embedded, and serial line control software. Ported the host software from 16-bit to 36- and 32-bit processors.
IBM Corporation (Summer 1977) Intern
Wrote and tested mainframe CPU microcode for an early model of 3090 processor,
codenamed
Patent Activity
Pending: “System and Method for Programmable Logic Acceleration of Data Processing Applications and Compiler Therefore,” filed March 2004
Pending: “VLIW with Variable Threading and Partitioning,” filed 2007
Professional
Memberships
Institute for Electrical and Electronic Engineers (IEEE)
Association for Computing Machinery (ACM)
Computer Society
American Association for the Advancement of Science (AAAS)